Thin polished plates such as silicon wafers and the like are a very important part of modern technology. A wafer, for instance, refers to a thin slice of semiconductor material used in the fabrication of integrated circuits and other devices. Other examples of thin polished plates may include magnetic disc substrates, gauge blocks and the like. While the technique described here refers mainly to wafers, it is to be understood that the technique also is applicable to other types of polished plates as well.
Generally, certain requirements may be established for the flatness and thickness uniformity of the wafers. There exist a variety of techniques to address the measurement of shape and thickness variation of wafers. One such technique is disclosed in U.S. Pat. No. 6,847,458, which is capable of measuring the surface height on both sides and thickness variation of a wafer. It combines two phase-shifting Fizeau interferometers to simultaneously obtain two single-sided distance map between each side of a wafer and corresponding reference flats, and computes thickness variation and shape of the wafer from the data and calibrated distance map between two reference flats. However, this technique only reduces errors caused by the tilt or the first order of cavity shape changes. It cannot remove errors caused by higher order shape changes of the cavity, including changes caused by temperature or stress.
Therein lies a need for methods for reducing wafer shape and thickness measurement errors resulted from cavity shape changes without the aforementioned shortcomings.